[PATCH] D83777: [ARM] Generate [SU]HADD from ((a + b) >> 1)

[Petre Tudor via Phabricator via llvm-commits]

PetreTudor created this revision.
Herald added subscribers: llvm-commits, danielkiss, hiraditya, kristof.beyls.
Herald added a project: LLVM.

Teach LLVM to recognize the above pattern, where the operands are
either signed or unsigned types.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D83777

Files:
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/lib/Target/AArch64/AArch64ISelLowering.h
  llvm/lib/Target/AArch64/AArch64InstrInfo.td
  llvm/test/CodeGen/AArch64/arm64-vhadd.ll

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