[PATCH] D83641: [AMDGPU] Apply pre-emit s_cbranch_vcc optimation to more patterns

[Carl Ritson via Phabricator via llvm-commits]

critson marked 3 inline comments as done.
critson added inline comments.


================
Comment at: llvm/test/CodeGen/AMDGPU/insert-skip-from-vcc.mir:343-344
+# GCN-LABEL: name: andn2_execz_mov_vccz
+# GCN-NOT: S_MOV_
+# GCN-NOT: S_ANDN2_
+# GCN: S_CBRANCH_EXECZ %bb.1, implicit $exec
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arsenm wrote:
> Negative checks make me nervous. Can you generate these?
We could switch the entire test to being generate, but generated MIR tests don't use CHECK-NEXT, so these would still fall through the cracks.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D83641/new/

https://reviews.llvm.org/D83641