[PATCH] D79875: [RISCV] Add matching of codegen patterns to RISCV Bit Manipulation Zbt asm instructions
Paolo Savini via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Jul 13 12:34:15 PDT 2020
PaoloS updated this revision to Diff 277534.
PaoloS added a comment.
Updated the test:
- the tests have been updated from the top of all the sub-patches together so that they are exactly the same as they would be if updated with the whole final patch.
- labels specific to the sub-extension have been added alongside the generic RISCVIB label (that activates all the sub-extensions) so that we can see how differently the patterns are matched with the specific subextension or with all of them together.
- the tests will probably fail if run by checking out the commit of a subextension and if updated they'll change. These tests are designed to work with the final squashed patch.
Added pattern-matching for fslw, fsrw, fsri and fsriw
Added the correspondent tests.
Corrected the order of the patterns.
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D79875/new/
https://reviews.llvm.org/D79875
Files:
llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h
llvm/lib/Target/RISCV/RISCVISelLowering.cpp
llvm/lib/Target/RISCV/RISCVInstrInfoB.td
llvm/test/CodeGen/RISCV/rv32Zbt.ll
llvm/test/CodeGen/RISCV/rv64Zbt.ll
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