[PATCH] D79870: [RISCV] Add matching of codegen patterns to RISCV Bit Manipulation Zbb asm instructions
Paolo Savini via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Jul 9 19:33:55 PDT 2020
PaoloS updated this revision to Diff 276897.
PaoloS added a comment.
Fixed indentation.
Added architecture type control for complex pattern matching of sloiw, sroiw and slliuw.
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D79870/new/
https://reviews.llvm.org/D79870
Files:
llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
llvm/lib/Target/RISCV/RISCVISelDAGToDAG.h
llvm/lib/Target/RISCV/RISCVISelLowering.cpp
llvm/lib/Target/RISCV/RISCVInstrInfoB.td
llvm/test/CodeGen/RISCV/rv32Zbb.ll
llvm/test/CodeGen/RISCV/rv64Zbb.ll
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D79870.276897.patch
Type: text/x-patch
Size: 67050 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20200710/a8c4d06f/attachment-0001.bin>
More information about the llvm-commits
mailing list