[PATCH] D81791: [X86][SSE] Add SimplifyDemandedVectorEltsForTargetShuffle to handle target shuffle variable masks.

Wed Jul 8 00:53:07 PDT 2020

yubing added inline comments.

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Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:36736
+    Constant *Elt = C->getAggregateElement(i);
+    if (!DemandedElts[i / Scale] && !isa<UndefValue>(Elt)) {
+      ConstVecOps.push_back(UndefValue::get(Elt->getType()));
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Hi, Simon. I'm just wondering why we divide i by scale here. In my case:
When SimplifyDemandedVectorEltsForTargetShuffle visit t150, demandedElts is 0xff0f, scale is 2. so when i=8, DemandedElts[i / Scale] is false, but DemandedElts[i] is true. Thus the t146[8] will become undef while the previous value is -1.

t146: i64 = X86ISD::Wrapper TargetConstantPool:i64<<32 x i8> <i8 4, i8 5, i8 6, i8 7, i8 undef, i8 undef, i8 undef, i8 undef, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef, i8 undef>> 0
t154: v16i8,ch = load<(load 16 from constant-pool, align 32)> t0, t146, undef:i64
t150: v16i8 = X86ISD::PSHUFB t156, t154

Repository:
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https://reviews.llvm.org/D81791