[PATCH] D81791: [X86][SSE] Add SimplifyDemandedVectorEltsForTargetShuffle to handle target shuffle variable masks.

Pengfei Wang via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Jul 8 00:42:07 PDT 2020


pengfei added inline comments.


================
Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:36727
+  unsigned NumCstElts = cast<FixedVectorType>(C->getType())->getNumElements();
+  if (NumCstElts != NumElts && NumCstElts != (NumElts * 2))
+    return false;
----------------
craig.topper wrote:
> RKSimon wrote:
> > craig.topper wrote:
> > > I think this check isn't enough if the load is narrower than the constant pool vector. For example a v16i8 load with a v32i8 constant pool. So NumCstElts == NumElts * 2 and we'll proceed.
> > > 
> > > I think this is the cause of some failures we're seeing, but I don't have a reduced case yet.
> > Does checking that Mask.getValueSizeInBits() == C->getSizeInBits() as well help?
> Yeah I ended up trying that right after I wrote my earlier message. That fixed the failing tests we had. I think we may have a reduced test case now. @pengfei or @yubing can you share it?
Sure. There's a small one here https://godbolt.org/z/hsh5_K


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D81791/new/

https://reviews.llvm.org/D81791





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