[PATCH] D81647: MIR Statepoint refactoring. Part 3: Spill GC Ptr regs.
Serguei Katkov via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Jul 7 21:10:43 PDT 2020
skatkov added a comment.
As I understand a lot of things here are done to workout the case that one catch block can correspond to different invoke instructions. Can you please add the test examine this case?
Repository:
rG LLVM Github Monorepo
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https://reviews.llvm.org/D81647/new/
https://reviews.llvm.org/D81647
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