[PATCH] D83251: [SystemZ] Allow specifying integer registers as part of the address calculation

[Ulrich Weigand via Phabricator via llvm-commits]

uweigand accepted this revision.
uweigand added a comment.
This revision is now accepted and ready to land.

A couple of cosmetic changes inline, otherwise the LGTM.   Thanks!



================
Comment at: llvm/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp:907
+
+  auto *CE = dyn_cast<MCConstantExpr>(Register);
+  if (!CE)
----------------
Good point, this should be const.


================
Comment at: llvm/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp:959
+  // (i.e. insn is of type BDVMem) is true.
+  RegisterGroup RegGroup = (HasVectorIndex) ? RegV : RegGR;
+
----------------
Parentheses around HasVectorIndex are not necessary.


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  https://reviews.llvm.org/D83251/new/

https://reviews.llvm.org/D83251