[PATCH] D83251: [SystemZ] Allow specifying integer registers as part of the address calculation
Anirudh Prasad via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Jul 6 12:28:18 PDT 2020
anirudhp created this revision.
anirudhp added reviewers: uweigand, Kai.
Herald added subscribers: llvm-commits, hiraditya.
Herald added a project: LLVM.
- Previously this patch https://reviews.llvm.org/rGe1de2773a534957305d7a559c6d88c4b5ac354e2) provided support for accepting integer registers in inline asm
i.e.
__asm("lhi %r0, 5") -> lhi %r0, 5
__asm("lhi 0, 5") -> lhi 0,5
- This patch aims to extend this support to instructions which compute addresses as well. (i.e instructions of type BDMem and BD[X|R|V|L]Mem)
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D83251
Files:
llvm/lib/Target/SystemZ/AsmParser/SystemZAsmParser.cpp
llvm/test/MC/SystemZ/insn-bad.s
llvm/test/MC/SystemZ/insn-good-z13.s
llvm/test/MC/SystemZ/insn-good-z14.s
llvm/test/MC/SystemZ/insn-good-z15.s
llvm/test/MC/SystemZ/insn-good.s
llvm/test/MC/SystemZ/regs-good.s
llvm/test/MC/SystemZ/tokens.s
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