[PATCH] D83245: [PowerPC][Power10] Exploit the xxsplti32dx instruction when lowering VECTOR_SHUFFLE.

[Nemanja Ivanovic via Phabricator via llvm-commits]

nemanjai accepted this revision.
nemanjai added a comment.
This revision is now accepted and ready to land.

The remaining updates are straightforward so feel free to address my comments on the commit. LGTM otherwise.



================
Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:9800
+  LHS = peekThroughBitcasts(LHS);
+  RHS = peekThroughBitcasts(RHS);
+  if (RHS->getOpcode() != ISD::BUILD_VECTOR) {
----------------
Forgot to remove these?


================
Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:9840
+    return SDValue();
+
+  SDValue SplatNode = DAG.getNode(
----------------
If the splat is smaller than 32 bits, you need to replicate it.
```
// If the splat is narrower than 32-bits, we need to get the 32-bit value
// for XXSPLTI32DX.
unsigned SplatVal = APSplatValue.getZExtValue();
for (; SplatBitSize < 32; SplatBitSize <<= 1)
  SplatVal |= (SplatVal << SplatBitSize);
```
and then use `SplatVal` below when creating the `XXSPLTI32DX` node.
We also need a test case for this. Something like:
```
vector int test(vector int a) {
  unsigned Val = 0xABABABAB;
  a[0] = Val;
  a[2] = Val;
  return a;
}
```
This should give you a `SplatBitSize == 8` and `APSplatValue == 0xAB`.


Repository:
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  https://reviews.llvm.org/D83245/new/

https://reviews.llvm.org/D83245