[PATCH] D83245: [PowerPC][Power10] Exploit the xxsplti32dx instruction when lowering VECTOR_SHUFFLE.

[Lei Huang via Phabricator via llvm-commits]

lei added inline comments.


================
Comment at: llvm/lib/Target/PowerPC/PPCInstrPrefix.td:46
 
+// PowerPC specific type constraints.
+def SDT_PPCSplat32 : SDTypeProfile<1, 3, [ SDTCisVT<0, v2i64>,
----------------
nit: Maybe 
```
PowerPC ISA 3.1 specific type constraints.
```


================
Comment at: llvm/lib/Target/PowerPC/PPCInstrPrefix.td:49
+  SDTCisVec<1>, SDTCisInt<2>, SDTCisInt<3>
+]>;
+
----------------
lei wrote:
> nit: indentation?
nvm.  This is how it's been done else where..


================
Comment at: llvm/lib/Target/PowerPC/PPCInstrPrefix.td:51
+
+// P10 specific PPCISD nodes.
+def PPCxxsplti32dx : SDNode<"PPCISD::XXSPLTI32DX", SDT_PPCSplat32, []>;
----------------
nit:
```
// ISA 3.1 specific PPCISD nodes.
```


Repository:
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  https://reviews.llvm.org/D83245/new/

https://reviews.llvm.org/D83245