[PATCH] D83245: [PowerPC][Power10] Exploit the xxsplti32dx instruction when lowering VECTOR_SHUFFLE.
Lei Huang via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Jul 6 11:44:50 PDT 2020
lei added inline comments.
================
Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:9791
+ SDValue VecShuffle(SVN, 0);
+ SDLoc dl(SVN);
+
----------------
`dl`->`DL`
================
Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:9824
+ unsigned SplatSize = SplatBitSize / 8;
+ if (SplatSize > 4)
+ return SDValue();
----------------
no need for the tmp `SplatSize`
```
if ((SplatBitSize / 8) > 4)
```
================
Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:9838
+ (((ShuffleMask[4] % 4 == 0) && (ShuffleMask[12] % 4 == 0)) &&
+ (ShuffleMask[4] > 15 && ShuffleMask[12] > 15))) // Case 1.
+ Index = DAG.getTargetConstant(IsLE ? 1 : 0, dl, MVT::i1);
----------------
There see to be alot of extra, unnecessary `()` here... since all these are `&&` I think alot of these can be removed.
================
Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:9840
+ Index = DAG.getTargetConstant(IsLE ? 1 : 0, dl, MVT::i1);
+ else if ((ShuffleMask[4] == 4 && ShuffleMask[12] == 12) && // Case 2.
+ (((ShuffleMask[0] % 4 == 0) && (ShuffleMask[8] % 4 == 0)) &&
----------------
same.
================
Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:9843
+ (ShuffleMask[0] > 15 && ShuffleMask[8] > 15)))
+ Index = DAG.getTargetConstant(IsLE ? 0 : 1, dl, MVT::i1);
+
----------------
I think you are missing:
```
else
return SDValue();
```
================
Comment at: llvm/lib/Target/PowerPC/PPCInstrPrefix.td:49
+ SDTCisVec<1>, SDTCisInt<2>, SDTCisInt<3>
+]>;
+
----------------
nit: indentation?
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D83245/new/
https://reviews.llvm.org/D83245
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