[PATCH] D83111: [X86-64] Support Intel AMX Intrinsic
Xiang Zhang via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sat Jul 4 21:02:12 PDT 2020
xiangzhangllvm added inline comments.
================
Comment at: clang/lib/Headers/amxintrin.h:130
+/// The destination tile to be zero. Max size is 1024 Bytes.
+#define _tile_zero(tile) \
+ __builtin_ia32_tilezero((tile))
----------------
MaskRay wrote:
> no need to wrap
>
> this applies to many other macros below
Sorry, do you mean needn't _tile_zero, just use __builtin_ia32_tilezero ?
Its is API for users, other compiler will also follow.
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D83111/new/
https://reviews.llvm.org/D83111
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