[PATCH] D83119: [Alignment][NFC] Use 5 bits to store Instructions Alignment

[Guillaume Chatelet via Phabricator via llvm-commits]

gchatelet marked 3 inline comments as done.
gchatelet added inline comments.


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Comment at: llvm/include/llvm/IR/Instruction.h:59
+  // Template alias so that all Instruction storing alignment use the same
+  // definiton.
+  template <unsigned Offset>
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courbet wrote:
> Add comment:  `// Align(1) is stored as 0. Valid alignments are powers of two from 2^0 to 2^MaxAlignmentExponent = 2^29, so we need 5 bits to encode the 30 possible values.`
I've reworded it a bit. I hope you don't mind.


Repository:
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  https://reviews.llvm.org/D83119/new/

https://reviews.llvm.org/D83119