[PATCH] D83119: [Alignment][NFC] Use 5 bits to store Instructions Alignment

[Clement Courbet via Phabricator via llvm-commits]

courbet accepted this revision.
courbet added a comment.
This revision is now accepted and ready to land.

Cool ! Only minor comments.



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Comment at: llvm/include/llvm/IR/Instruction.h:61
+  template <unsigned Offset>
+  using BitfieldAlignmentElement =
+      typename Bitfield::Element<unsigned, Offset, 5,
----------------
[bikeshedding] Shouldn't that be `AlignmentBitfieldElement` ?


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Comment at: llvm/include/llvm/IR/Instruction.h:59
+  // Template alias so that all Instruction storing alignment use the same
+  // definiton.
+  template <unsigned Offset>
----------------
Add comment:  `// Align(1) is stored as 0. Valid alignments are powers of two from 2^0 to 2^MaxAlignmentExponent = 2^29, so we need 5 bits to encode the 30 possible values.`


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https://reviews.llvm.org/D83119