[PATCH] D83052: [PowerPC][Power10] Add Vector Insert Instruction Definitions and MC Tests

[Amy Kwan via Phabricator via llvm-commits]

amyk updated this revision to Diff 275144.
amyk added a comment.

Refactor the patch to use multiclass.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D83052/new/

https://reviews.llvm.org/D83052

Files:
  llvm/lib/Target/PowerPC/PPCInstrPrefix.td
  llvm/test/MC/Disassembler/PowerPC/ppc64-encoding-ISA31.txt
  llvm/test/MC/PowerPC/ppc64-encoding-ISA31.s

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