[PATCH] D82520: [Power10] Implement Vector Splat Immediate Builtins in LLVM/Clang

Biplob Mishra via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Jun 29 22:00:28 PDT 2020


biplmish marked 2 inline comments as done.
biplmish added a comment.

On intrinsics -> hw instructions, will have a discussion and if needs to be implemented in these lines.



================
Comment at: llvm/lib/Target/PowerPC/PPCInstrPrefix.td:573
+let Predicates = [PrefixInstrs] in {
+  def XXSPLTIW : 8RR_DForm_IMM32_XT6<32, 3, (outs vsrc:$XT),
+                                     (ins i32imm:$IMM32),
----------------
steven.zhang wrote:
> Not prefix instruction.
These are prefixed 64 bit instructions.


================
Comment at: llvm/lib/Target/PowerPC/PPCInstrPrefix.td:581
+                                      [(set v2f64:$XT,
+                                        (PPCxxspltidp i32:$IMM32))]>;
+  def XXSPLTI32DX :
----------------
steven.zhang wrote:
> Can you explain more on why we need this pattern ? I didn't see any test for this .
This is used in XXSPLTIDP. The input to builtin is a single precision float which needs to be converted to a double precision for the input xxspltidp




CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D82520/new/

https://reviews.llvm.org/D82520





More information about the llvm-commits mailing list