[PATCH] D81638: AMDGPU/GlobalISel: Fix 96 and 128 local loads and stores

Mirko Brkusanin via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Jun 29 10:15:34 PDT 2020


mbrkusanin updated this revision to Diff 274166.
mbrkusanin edited the summary of this revision.
mbrkusanin set the repository for this revision to rG LLVM Github Monorepo.
mbrkusanin added a comment.

Code that was changing alignment requirements from SITargetLowering::allowsMisalignedMemoryAccessesImpl in now in D82788 <https://reviews.llvm.org/D82788>.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D81638/new/

https://reviews.llvm.org/D81638

Files:
  llvm/lib/Target/AMDGPU/AMDGPU.td
  llvm/lib/Target/AMDGPU/AMDGPUGISel.td
  llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
  llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
  llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
  llvm/lib/Target/AMDGPU/AMDGPUInstructions.td
  llvm/lib/Target/AMDGPU/DSInstructions.td
  llvm/lib/Target/AMDGPU/SIInstrInfo.td
  llvm/test/CodeGen/AMDGPU/GlobalISel/load-local.128.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/load-local.96.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/store-local.128.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/store-local.96.ll

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