[PATCH] D81416: [LV][SLP] Interleave to expose ILP for small loops with scalar reductions.

[Aaron H Liu via Phabricator via llvm-commits]

AaronLiu added a comment.

Currently all four testcases serve different purposes, and we can clearly see their differences:

- PhaseOrdering/interleave_LV_SLP_false.ll gives the baseline result, which shows that with the option in this patch **off**, instructions are **not being vectorized**.
- PhaseOrdering/interleave_LV_SLP.ll also gives the baseline result,  which shows that with the option in this patch **on**, instructions are **being vectorized**. But which vectorizer make it work? We cannot tell.
- Vectorize/LoopVectorize.cpp tells us that LV cannot vectorize the code, but interleave the instructions to expose ILP.
- SLPVectorizer/PowerPC/interleave_SLP.ll demonstrates that after interleaving by LV, then SLP captures the opportunities and vectorize the instructions.


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  https://reviews.llvm.org/D81416/new/

https://reviews.llvm.org/D81416