[PATCH] D82551: [AMDGPU] Don't combine DPP if DPP register is used more than once per instruction
Jay Foad via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Jun 26 01:36:36 PDT 2020
foad added inline comments.
================
Comment at: llvm/lib/Target/AMDGPU/GCNDPPCombine.cpp:540-541
}
} else if (OrigMI.isCommutable() &&
Use == TII->getNamedOperand(OrigMI, AMDGPU::OpName::src1)) {
auto *BB = OrigMI.getParent();
----------------
It would be much simpler to add a check here that src0 and src1 are not the same register.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D82551/new/
https://reviews.llvm.org/D82551
More information about the llvm-commits
mailing list