[PATCH] D82551: [AMDGPU] Don't combine DPP if DPP register is used more than once per instruction

[Stanislav Mekhanoshin via Phabricator via llvm-commits]

rampitec added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/GCNDPPCombine.cpp:359
+  // see defusechain_iterator::operator++
+  if (!Uses.empty() && Uses.back()->getParent() == Use->getParent()) {
+    LLVM_DEBUG(
----------------
I assume this exploits the fact we have no instructions which may have more than two uses and are dpp combinable at the same time? If so it deserves a comment.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D82551/new/

https://reviews.llvm.org/D82551