[PATCH] D82440: [Power10] Implement Vector Shift Double Bit Immediate Builtins in LLVM/Clang

[Biplob Mishra via Phabricator via llvm-commits]

biplmish marked an inline comment as done.
biplmish added inline comments.


================
Comment at: clang/test/CodeGen/builtins-ppc-p10vector.c:89
+  // CHECK-NEXT: ret <16 x i8>
+  return vec_sldb(vsca, vscb, 0);
+}
----------------
biplmish wrote:
> amyk wrote:
> > `SH` can be any integer value between 0 and 7. It is better to add some checking to make sure the immediate is between these values.
> I dont see the shift bounds specified. Can you confirm.
So while the user input does need bound, the instruction expects values in range 0-7. So we can bound the user and also add a check. 


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D82440/new/

https://reviews.llvm.org/D82440