[llvm] b2eb1c5 - [X86] Fix a typo error.

[via llvm-commits]

Author: Wang, Pengfei
Date: 2020-06-25T10:06:27+08:00
New Revision: b2eb1c5793d78d70c1223b098aefc87050f69a8c

URL: https://github.com/llvm/llvm-project/commit/b2eb1c5793d78d70c1223b098aefc87050f69a8c
DIFF: https://github.com/llvm/llvm-project/commit/b2eb1c5793d78d70c1223b098aefc87050f69a8c.diff

LOG: [X86] Fix a typo error.

Summary: This will result opcode MULX32Hrm been emitted to MULX32Hrr.

Reviewed by: craig.topper

Differential Revision: https://reviews.llvm.org/D82472

Added: 
    

Modified: 
    llvm/lib/Target/X86/X86MCInstLower.cpp
    llvm/test/CodeGen/X86/bug80500.ll

Removed: 
    


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diff  --git a/llvm/lib/Target/X86/X86MCInstLower.cpp b/llvm/lib/Target/X86/X86MCInstLower.cpp
index 60f29ae5e6a5..9ce2a4637e2e 100644
--- a/llvm/lib/Target/X86/X86MCInstLower.cpp
+++ b/llvm/lib/Target/X86/X86MCInstLower.cpp
@@ -518,7 +518,7 @@ void X86MCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const {
     switch (OutMI.getOpcode()) {
     default: llvm_unreachable("Invalid opcode");
     case X86::MULX32Hrr: NewOpc = X86::MULX32rr; break;
-    case X86::MULX32Hrm: NewOpc = X86::MULX32rr; break;
+    case X86::MULX32Hrm: NewOpc = X86::MULX32rm; break;
     case X86::MULX64Hrr: NewOpc = X86::MULX64rr; break;
     case X86::MULX64Hrm: NewOpc = X86::MULX64rm; break;
     }

diff  --git a/llvm/test/CodeGen/X86/bug80500.ll b/llvm/test/CodeGen/X86/bug80500.ll
index 9883d8eae4c2..94893365a32e 100644
--- a/llvm/test/CodeGen/X86/bug80500.ll
+++ b/llvm/test/CodeGen/X86/bug80500.ll
@@ -8,7 +8,7 @@ define i32 @load_fold_udiv1(i32* %p) {
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %eax
 ; CHECK-NEXT:    movl $-2004318071, %edx # imm = 0x88888889
-; CHECK-NEXT:    mulxl %eax, %eax, %eax
+; CHECK-NEXT:    mulxl (%eax), %eax, %eax
 ; CHECK-NEXT:    shrl $3, %eax
 ; CHECK-NEXT:    retl
   %v = load i32, i32* %p, align 4