[llvm] bcb7534 - [X86][NFC] Pre-commit test case for the following patch.

[Pengfei Wang via llvm-commits]

Author: Pengfei Wang
Date: 2020-06-24T18:37:01-07:00
New Revision: bcb75344a598d3b2ab200a2cc73842805102fbab

URL: https://github.com/llvm/llvm-project/commit/bcb75344a598d3b2ab200a2cc73842805102fbab
DIFF: https://github.com/llvm/llvm-project/commit/bcb75344a598d3b2ab200a2cc73842805102fbab.diff

LOG: [X86][NFC] Pre-commit test case for the following patch.

Added: 
    llvm/test/CodeGen/X86/bug80500.ll

Modified: 
    

Removed: 
    


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diff  --git a/llvm/test/CodeGen/X86/bug80500.ll b/llvm/test/CodeGen/X86/bug80500.ll
new file mode 100644
index 000000000000..9883d8eae4c2
--- /dev/null
+++ b/llvm/test/CodeGen/X86/bug80500.ll
@@ -0,0 +1,17 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=i686 -mcpu=skylake | FileCheck %s
+
+; Fix for a typo introduced by D80500
+
+define i32 @load_fold_udiv1(i32* %p) {
+; CHECK-LABEL: load_fold_udiv1:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    movl {{[0-9]+}}(%esp), %eax
+; CHECK-NEXT:    movl $-2004318071, %edx # imm = 0x88888889
+; CHECK-NEXT:    mulxl %eax, %eax, %eax
+; CHECK-NEXT:    shrl $3, %eax
+; CHECK-NEXT:    retl
+  %v = load i32, i32* %p, align 4
+  %ret = udiv i32 %v, 15
+  ret i32 %ret
+}