[PATCH] D82439: [ARM] Rearrange SizeReduction when using -Oz

[Sjoerd Meijer via Phabricator via llvm-commits]

SjoerdMeijer added a comment.

> You mean, the scheduling models don't handle Thumb1 instructions well?

Yes. Only certain pairs of 16-bit instructions can be dual issued, but we don't know if instructions are Thumb1 or not. So there's room for improvement here.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D82439/new/

https://reviews.llvm.org/D82439