[PATCH] D81651: [AMDGPU][CODEGEN] Added support of new inline assembler constraints

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


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Comment at: llvm/docs/LangRef.rst:4151
+- ``J``: A 16-bit signed integer constant.
+- ``L``: A 15-bit unsigned integer constant.
 - ``A``: An integer or a floating-point inline constant.
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This one is weird; we don't actually have any of these instructions?


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Comment at: llvm/lib/Target/AMDGPU/SIISelLowering.cpp:11065
+    unsigned UnusedBits = 64 - Size;
+    Val = (Val << UnusedBits) >> UnusedBits;
+  }
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Val & maskTrailingOnes(Size) might be clearer


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D81651/new/

https://reviews.llvm.org/D81651