[PATCH] D77029: Fix out-of-bounds BitVector access in RegScavenger

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


================
Comment at: llvm/lib/CodeGen/RegisterScavenging.cpp:126
           if (MO.clobbersPhysReg(*RURI)) {
             TmpRegUnits.set(RU);
             break;
----------------
I assume if you put an unreachable here, something breaks? If you find that testcase, it should be easy to derive one


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D77029/new/

https://reviews.llvm.org/D77029