[PATCH] D59733: ARM: Allow cp10/cp11 coprocessor register access with a warning

[Stefan Agner via Phabricator via llvm-commits]

falstaff84 marked an inline comment as done.
falstaff84 added a comment.

@simon_tatham not sure what you exactly mean, for ARMv7 we only disallowed this pair, and this change removes that restriction. So now, all of them are allowed...

I did not look into the ARMv8 situation all to much, but the ARMv8-M reference manual explicitly mentions cp10/cp11 as allowed coprocessor names:

ARMv8-M reference manual (ARM DDI 0553A.e (ID060617))  for MCR/MCR coproc says:

> The valid coprocessor names are p10, p11, p14, and p15.





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Comment at: llvm/test/MC/ARM/coprocessors.s:52
+@ ACCEPT-01234567CD: mrc   p10, #1, r2, c3, c4, #5
+@ REJECT-01234567CD: [[@LINE-2]]:7: error: invalid operand for instruction
 
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simon_tatham wrote:
> This seems like a confusing way to change the test. The check prefix `ACCEPT-AB` is for test runs where coprocessors 10 and 11 (A and B) are accepted, and `REJECT-AB` for where they are rejected. So please leave these check lines as they were, so that each check prefix matches the message it's expecting, and instead change the set of `--check-prefix` options on the `llvm-mc` command whose behavior is changing.
Oh I see, now I get what does numbers mean! For some reason, I just dismissed the idea that this numbers have meaning :-)

Of course, will fix this.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D59733/new/

https://reviews.llvm.org/D59733