[PATCH] D59733: ARM: Allow cp10/cp11 coprocessor register access with a warning

Simon Tatham via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Jun 22 06:25:05 PDT 2020


simon_tatham added a comment.

> for ARMv7 we only disallowed this pair, and this change removes that restriction. So now, all of them are allowed...

Yes, //for Arm v7//.

What I'm getting at is: should we turn the //whole// of `isValidCoprocessorNumber` into warnings of this kind, on the same principle (that it's OK to write any CDP instruction if it's in the context of code that will dynamically decide at run time which instructions to actually execute)? If not, what makes this v7 constraint different from the v8 ones?


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D59733/new/

https://reviews.llvm.org/D59733





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