[PATCH] D81908: [MIPS] Fix incorrect relocations of instruction

Tue Jun 16 23:57:45 PDT 2020

xiangzhai added a comment.

> powerpc's behavior is definitely correct. AArch64 and MIPS's permissive behaviors are not good. A symbolic value (which can be 32-bit/64-bit) requires more bits than the immediate bits. I think flagging the instruction in the case of a symbolic value is fine.
> 
> FWIW: I filed a feature request for GNU as: https://sourceware.org/bugzilla/show_bug.cgi?id=26126

To MIPS64, `ORI` and `DADDIU` only have the 16-bit signed immediate, but GNU toolchain treat it as `%lo(MCBinaryExpr)`, so LLVM toolchain is just able to reject it as @hev implementation, or workaround `ExprKind::Binary` to `ExprKind::Target` for BAD relocation directive N64 testcase  D81919 <https://reviews.llvm.org/D81919>

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D81908/new/

https://reviews.llvm.org/D81908