[llvm] d98a7c3 - GlobalISel: Use Register

[Matt Arsenault via llvm-commits]

Author: Matt Arsenault
Date: 2020-06-16T14:32:47-04:00
New Revision: d98a7c3cf4610e5963a05e5d5a12bf43fea8e22c

URL: https://github.com/llvm/llvm-project/commit/d98a7c3cf4610e5963a05e5d5a12bf43fea8e22c
DIFF: https://github.com/llvm/llvm-project/commit/d98a7c3cf4610e5963a05e5d5a12bf43fea8e22c.diff

LOG: GlobalISel: Use Register

Added: 
    

Modified: 
    llvm/include/llvm/CodeGen/GlobalISel/LegalizationArtifactCombiner.h

Removed: 
    


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diff  --git a/llvm/include/llvm/CodeGen/GlobalISel/LegalizationArtifactCombiner.h b/llvm/include/llvm/CodeGen/GlobalISel/LegalizationArtifactCombiner.h
index 5c677981e493..25807fc3ff28 100644
--- a/llvm/include/llvm/CodeGen/GlobalISel/LegalizationArtifactCombiner.h
+++ b/llvm/include/llvm/CodeGen/GlobalISel/LegalizationArtifactCombiner.h
@@ -805,7 +805,7 @@ class LegalizationArtifactCombiner {
   }
 
 private:
-  static unsigned getArtifactSrcReg(const MachineInstr &MI) {
+  static Register getArtifactSrcReg(const MachineInstr &MI) {
     switch (MI.getOpcode()) {
     case TargetOpcode::COPY:
     case TargetOpcode::G_TRUNC:
@@ -839,7 +839,7 @@ class LegalizationArtifactCombiner {
     // and as a result, %3, %2, %1 are dead.
     MachineInstr *PrevMI = &MI;
     while (PrevMI != &DefMI) {
-      unsigned PrevRegSrc = getArtifactSrcReg(*PrevMI);
+      Register PrevRegSrc = getArtifactSrcReg(*PrevMI);
 
       MachineInstr *TmpDef = MRI.getVRegDef(PrevRegSrc);
       if (MRI.hasOneUse(PrevRegSrc)) {
@@ -908,7 +908,7 @@ class LegalizationArtifactCombiner {
 
   /// Looks through copy instructions and returns the actual
   /// source register.
-  unsigned lookThroughCopyInstrs(Register Reg) {
+  Register lookThroughCopyInstrs(Register Reg) {
     Register TmpReg;
     while (mi_match(Reg, MRI, m_Copy(m_Reg(TmpReg)))) {
       if (MRI.getType(TmpReg).isValid())