[PATCH] D81841: AMDGPU: Don't use 16-bit FP inline constants in integer operands

Tue Jun 16 06:37:21 PDT 2020

dp accepted this revision.
dp added a comment.
This revision is now accepted and ready to land.

LGTM with minor notes

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Comment at: llvm/lib/Target/AMDGPU/MCTargetDesc/AMDGPUInstPrinter.cpp:598
+
+      //  Deal with 16-bit FP inline immediates not working.
+      if (OpTy == AMDGPU::OPERAND_REG_IMM_V2FP16) {
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Extra space

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Comment at: llvm/test/MC/AMDGPU/gfx9_asm_all.s:1
+// XFAIL: *
 // RUN: llvm-mc -arch=amdgcn -mcpu=gfx900 -show-encoding %s | FileCheck %s
----------------
You disabled all tests so other changes in this file should probably be reverted.

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Comment at: llvm/test/MC/Disassembler/AMDGPU/literalv216_gfx10.txt:82

-# GFX10: v_pk_mad_i16 v5, 1.0, 2.0, 4.0  ; encoding: [0x05,0x40,0x00,0xcc,0xf2,0xe8,0xd9,0x1b]
+# GFX10: v_pk_mad_i16 v5, 0x3c00, 0x4000, 0x4400  ; encoding: [0x05,0x40,0x00,0xcc,0xff,0xfe,0xfd,0x1b,0x00,0x3c,0x00,0x00]
 0x05,0x40,0x00,0xcc,0xf2,0xe8,0xd9,0x1b
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This and subsequent changes define special tests which check that disassembler is able to decode invalid instructions. Should they be separated from regular tests? Or have an appropriate comment?

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D81841/new/

https://reviews.llvm.org/D81841