[PATCH] D81536: [VE] Support convert instructions in MC layer
Kazushi Marukawa via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Jun 10 00:30:31 PDT 2020
kaz7 created this revision.
kaz7 added reviewers: simoll, k-ishizaka.
kaz7 added projects: LLVM, VE.
Herald added subscribers: llvm-commits, hiraditya.
Add CVTSQ/CVTDQ/CVTQD/CVTQS instructions. Add regression tests for
them and other convert instructions of asmparser, mccodeemitter, and
disassembler. In order to add those instructions, support RD operands
in asmparser, mccodeemitter, and disassembler.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D81536
Files:
llvm/lib/Target/VE/AsmParser/VEAsmParser.cpp
llvm/lib/Target/VE/Disassembler/VEDisassembler.cpp
llvm/lib/Target/VE/MCTargetDesc/VEMCCodeEmitter.cpp
llvm/lib/Target/VE/VE.h
llvm/lib/Target/VE/VEInstrInfo.td
llvm/test/MC/VE/CVTDL.s
llvm/test/MC/VE/CVTDQ.s
llvm/test/MC/VE/CVTDS.s
llvm/test/MC/VE/CVTDW.s
llvm/test/MC/VE/CVTLD.s
llvm/test/MC/VE/CVTQD.s
llvm/test/MC/VE/CVTQS.s
llvm/test/MC/VE/CVTSD.s
llvm/test/MC/VE/CVTSQ.s
llvm/test/MC/VE/CVTSW.s
llvm/test/MC/VE/CVTWD.s
llvm/test/MC/VE/CVTWS.s
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