[PATCH] D81301: [X86] Emit two-byte NOP when possible

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sat Jun 6 12:49:13 PDT 2020


craig.topper added a comment.

In D81301#2078189 <https://reviews.llvm.org/D81301#2078189>, @aganea wrote:

> In D81301#2077585 <https://reviews.llvm.org/D81301#2077585>, @reames wrote:
>
> > Are two byte nops legal on all 32 bit x86?  The comment seems to imply no.
> >
> > Once this question is answered and we're happy with the general design, I will ask you to split out the NFC signature change and land it separately, but let's *not* do that yet.
>
>
> My understanding is that the story goes like this:
>
> - `90 NOP` - introduced with 8086.
> - `66 90 XCHG AX, AX` - supported starting with 80386, with the introduction of instruction prefixes [1]
> - `0F 1F 00 .. NOP DWORD ptr` - long NOP variants were introduced with SSE, in Pentium III Katmai [2]
>
>   `llvm/lib/Target/X86/X86.td` specifies `FeatureNOPL` being supported in Pentium Pro [3] and Pentium 2 [4], but looking at the respective manuals that seems incorrect. There's no trace of long NOP instructions for those CPUs. @craig.topper could you please confirm?


Other sites on internet show them a being added in P6 <https://reviews.llvm.org/P6>(Pentium Pro). For example the row for group 16 here https://sandpile.org/x86/opc_grp.htm    I think they were undocumented for a long time since they were originally intended for future expansion. So they didn't want compilers to start depending on them as NOPs. Sometime later they made 0F 1F an official multibyte NOP. 0F 18 eventually became a prefetch instruction, but you can still execute it on a Pentium Pro, it just won't do anything.


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