[PATCH] D81172: [AMDGPU] Implement hardware bug workaround for image instructions

[Rodrigo Dominguez via Phabricator via llvm-commits]

rdomingu marked 3 inline comments as done.
rdomingu added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/SIISelLowering.cpp:5370-5371
+      // instructions.
+      if (IsD16 && !Subtarget->hasUnpackedD16VMem() &&
+          !(BaseOpcode->Gather4 && Subtarget->hasImageGather4D16Bug()))
         NumVDataDwords = (DMaskLanes + 1) / 2;
----------------
arsenm wrote:
> IsD16 && (!hasUnpackedD16() || (Gather4 && hasGatherbug))?
We want NumVDataDwords = DMaskLanes for Gather4 && IsD16 && hasGatherBug. That wouldn't be the case with your suggestion.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D81172/new/

https://reviews.llvm.org/D81172