[PATCH] D81139: [ARM] MVE VCVT lowering for f32->f16 truncs

[Eli Friedman via Phabricator via llvm-commits]

efriedma added a comment.

x86 has similar issues with SSE2 floating-point.  I think maybe some other targets have related issues.

The key function that's making everything a complete mess is DAGTypeLegalizer::WidenVecRes_Convert.  Ideally, it would have some target-independent vector operation it could generate (compare to DAGTypeLegalizer::WidenVecOp_EXTEND).  But barring that, it probably makes sense to custom-legalize it.  Pattern-matching the build_vector isn't broken, exactly, but it involves a lot of DAG nodes.


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  https://reviews.llvm.org/D81139/new/

https://reviews.llvm.org/D81139