[PATCH] D81006: [PowerPC] fix a bug for folding RLWINM(LI) to LI due to wrap mask
ChenZheng via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Jun 3 19:17:44 PDT 2020
shchenz updated this revision to Diff 268347.
shchenz added a comment.
update test case
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D81006/new/
https://reviews.llvm.org/D81006
Files:
llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
llvm/test/CodeGen/PowerPC/fold-rlwinm.mir
Index: llvm/test/CodeGen/PowerPC/fold-rlwinm.mir
===================================================================
--- llvm/test/CodeGen/PowerPC/fold-rlwinm.mir
+++ llvm/test/CodeGen/PowerPC/fold-rlwinm.mir
@@ -168,3 +168,17 @@
; CHECK: %3:gprc = RLWINM %2, 19, 10, 20
BLR8 implicit $lr8, implicit $rm
...
+---
+name: testFoldRLWINMLIWrapMask
+#CHECK: name: testFoldRLWINMLIWrapMask
+tracksRegLiveness: true
+body: |
+ bb.0.entry:
+ liveins: $x3
+ %0:gprc = COPY $x3
+ %1:gprc = LI 100
+ ; CHECK: %2:gprc = LI 200
+ %2:gprc = RLWINM %1:gprc, 1, 3, 2
+ STW %2:gprc, %0:gprc, 100
+ BLR8 implicit $lr8, implicit $rm
+...
Index: llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
===================================================================
--- llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
+++ llvm/lib/Target/PowerPC/PPCInstrInfo.cpp
@@ -3417,8 +3417,12 @@
int64_t ME = MI.getOperand(4).getImm();
APInt InVal(32, SExtImm, true);
InVal = InVal.rotl(SH);
- // Set the bits ( MB + 32 ) to ( ME + 32 ).
- uint64_t Mask = ((1LLU << (32 - MB)) - 1) & ~((1LLU << (31 - ME)) - 1);
+ APInt Mask = APInt::getBitsSetWithWrap(32, 32 - ME - 1, 32 - MB);
+ // Current APInt::getBitsSetWithWrap sets all bits to 0 if loBit is equal
+ // to highBit.
+ // If MB - ME == 1, we expect a full set mask instead of 0.
+ if (MB - ME == 1)
+ Mask.setAllBits();
InVal &= Mask;
// Can't replace negative values with an LI as that will sign-extend
// and not clear the left bits. If we're setting the CR bit, we will use
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