[PATCH] D81112: [AArch64][GlobalISel] Add selection support for rev16, rev32, and rev64

Amara Emerson via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Jun 3 14:56:10 PDT 2020


aemerson accepted this revision.
aemerson added a comment.
This revision is now accepted and ready to land.

LGTM with nit/



================
Comment at: llvm/lib/Target/AArch64/AArch64PostLegalizerCombiner.cpp:38
+  SmallVector<SrcOp, 2> SrcOps; ///< Source registers.
+  ShuffleVectorPseudo(unsigned Opc, Register &Dst,
+                      std::initializer_list<SrcOp> SrcOps)
----------------
We don't need to pass Dst by ref here do we?


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