[PATCH] D81112: [AArch64][GlobalISel] Add selection support for rev16, rev32, and rev64

Jessica Paquette via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Jun 3 12:05:42 PDT 2020


paquette created this revision.
paquette added a reviewer: aemerson.
Herald added subscribers: danielkiss, hiraditya, kristof.beyls, rovka.
Herald added a project: LLVM.
paquette added a parent revision: D81049: [AArch64][GlobalISel] Select uzp1 and uzp2.

This does three things:

1. Adds G_REV16, G_REV32, and G_REV64. These are equivalent to AArch64rev16, AArch64rev32, and AArch64rev64 respectively.

2. Adds support for producing G_REV64 in the postlegalizer combiner. We don't legalize any of the shuffles which could give us a G_REV32 or G_REV16 yet. Since the function for detecting the rev mask is lifted from AArch64ISelLowering, it should work for G_REV32 and G_REV16 when we get there.

3. Adds a selection test for a good portion of the patterns imported for the rev family. The only ones which are not tested are the ones with bitconvert.

This also does a little cleanup, and adds a struct for shuffle vector pseudo matchdata. This lets us still use `applyShuffleVectorPseudo` rather than adding a new function. It should also make it a bit easier to port some of the other masks from AArch64ISelLowering. (e.g. `isZIP_v_undef_Mask` and friends)


https://reviews.llvm.org/D81112

Files:
  llvm/lib/Target/AArch64/AArch64Combine.td
  llvm/lib/Target/AArch64/AArch64InstrGISel.td
  llvm/lib/Target/AArch64/AArch64PostLegalizerCombiner.cpp
  llvm/test/CodeGen/AArch64/GlobalISel/postlegalizer-combiner-rev.mir
  llvm/test/CodeGen/AArch64/GlobalISel/select-rev.mir

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