[PATCH] D80720: [CodeGen,AArch64] Fix up warnings in splitStores

Sander de Smalen via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Jun 3 13:11:19 PDT 2020


sdesmalen added inline comments.


================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:12091
+
+  if (!VT.isFixedLengthVector()) {
+    // All SVE vectors should be aligned to 16 bytes
----------------
`VT.isScalableVector()` ?


================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:12093
+    // All SVE vectors should be aligned to 16 bytes
+    assert(!VT.isScalableVector() || S->getAlignment() == 16 &&
+           "Alignment is not 16 bytes for scalable vectors!");
----------------
It's a bit odd to assert `!VT.isScalableVector()` here given the condition above, but I also don't really see why you're asserting the alignment here in this function. What was the motivation for adding it?


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D80720/new/

https://reviews.llvm.org/D80720





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