[PATCH] D80720: [CodeGen,AArch64] Fix up warnings in splitStores

[David Sherwood via Phabricator via llvm-commits]

david-arm updated this revision to Diff 268067.
david-arm edited the summary of this revision.

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D80720/new/

https://reviews.llvm.org/D80720

Files:
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp


Index: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
===================================================================
--- llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
+++ llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
@@ -12087,8 +12087,13 @@
 
   SDValue StVal = S->getValue();
   EVT VT = StVal.getValueType();
-  if (!VT.isVector())
+
+  if (!VT.isFixedLengthVector()) {
+    // All SVE vectors should be aligned to 16 bytes
+    assert(!VT.isScalableVector() || S->getAlignment() == 16 &&
+           "Alignment is not 16 bytes for scalable vectors!");
     return SDValue();
+  }
 
   // If we get a splat of zeros, convert this vector store to a store of
   // scalars. They will be merged into store pairs of xzr thereby removing one


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