[PATCH] D81108: [AArch64] Fix ldst-opt of multiple disjunct subregs.
Eli Friedman via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Jun 3 12:05:41 PDT 2020
efriedma added inline comments.
================
Comment at: llvm/lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp:1296
+ // impacting other instructions we did not check. Bail out.
+ if (RegClass->HasDisjunctSubRegs) {
+ LLVM_DEBUG(
----------------
The fact that this doesn't whitelist specific opcodes makes me suspicious this is overlooking other potential issues. Some instructions with two outputs require that they aren't equal. A call instruction modifies a fixed register. Some instructions have restricted register classes.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D81108/new/
https://reviews.llvm.org/D81108
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