[PATCH] D81082: [PowerPC] Do not add the relocation addend to the instruction encoding

[Sean Fertile via Phabricator via llvm-commits]

sfertile added a comment.
Herald added a subscriber: wuzish.

Do you already have a test which dumps the relocations and verifies the addend on the relocations? (Do the llvm tools support dumping these new relocations?)



================
Comment at: llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp:222
                         static_cast<MCFixupKind>(PPC::fixup_ppc_pcrel34)));
-    // There is no offset to return so just return 0.
-    return 0;
+    break;
   }
----------------
I think you are better keeping the return here.


================
Comment at: llvm/lib/Target/PowerPC/MCTargetDesc/PPCMCCodeEmitter.cpp:254
                         static_cast<MCFixupKind>(PPC::fixup_ppc_pcrel34)));
-    assert(isInt<34>(CE->getValue()) && "Value must fit in 34 bits.");
-    // Return the offset that should be added to the relocation by the linker.
-    return (CE->getValue() & 0x3FFFFFFFFUL) | RegBits;
-    }
+    break;
+  }
----------------
ditto.


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  https://reviews.llvm.org/D81082/new/

https://reviews.llvm.org/D81082