[PATCH] D80745: [DAGCombiner] Add a command line option to guard ReduceLoadOpStoreWidth

[Eli Friedman via Phabricator via llvm-commits]

efriedma added inline comments.


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Comment at: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:15414
+  if (!EnableReduceLoadOpStoreWidth)
+    return SDValue();
+
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There are two separate transforms here: ShrinkLoadReplaceStoreWithStore, which actually erases the load, and the isNarrowingProfitable transform, which just shrinks the store.  The performance implications might be different, so I think we want separate flags.

(We don't really want to encourage users to use these flags in production, but I think it's okay to add them to evaluate the performance impact.)


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Comment at: llvm/test/CodeGen/X86/clear-bitfield.ll:9
+  %0 = bitcast %struct.bit_fields* %ptr to i32*
+  %bf.load = load i32, i32* %0
+  %bf.clear = and i32 %bf.load, -2
----------------
Probably we want to see what happens with i16 specifically, since there's some weirdness involving the encodings.

Please generate checks with update_llc_test_checks.py.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D80745/new/

https://reviews.llvm.org/D80745