[PATCH] D80745: [DAGCombiner] Add a command line option to guard ReduceLoadOpStoreWidth

[Guozhi Wei via Phabricator via llvm-commits]

Carrot created this revision.
Carrot added a reviewer: eli.friedman.
Herald added subscribers: llvm-commits, ecnelises, hiraditya.
Herald added a project: LLVM.

As discussed in the thread http://lists.llvm.org/pipermail/llvm-dev/2020-May/141838.html, some bit field access width can be reduced by ReduceLoadOpStoreWidth, some can't. If two accesses are very close, and the first access width is reduced, the second is not. Then the wide load of second access will be stalled for long time.

This patch guards the function ReduceLoadOpStoreWidth with a new command line option combiner-reduce-load-op-store-width, so it gives user a chance to disable ReduceLoadOpStoreWidth.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D80745

Files:
  llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  llvm/test/CodeGen/X86/clear-bitfield.ll


Index: llvm/test/CodeGen/X86/clear-bitfield.ll
===================================================================
--- /dev/null
+++ llvm/test/CodeGen/X86/clear-bitfield.ll
@@ -0,0 +1,14 @@
+; RUN: llc < %s -mtriple=x86_64-- -combiner-reduce-load-op-store-width=false | FileCheck %s
+
+%struct.bit_fields = type { i32 }
+
+; CHECK:  andl $-2, (%rdi)
+define void @clear_b1(%struct.bit_fields* %ptr) {
+entry:
+  %0 = bitcast %struct.bit_fields* %ptr to i32*
+  %bf.load = load i32, i32* %0
+  %bf.clear = and i32 %bf.load, -2
+  store i32 %bf.clear, i32* %0
+  ret void
+}
+
Index: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
===================================================================
--- llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -125,6 +125,11 @@
     cl::desc("Limit the number of times for the same StoreNode and RootNode "
              "to bail out in store merging dependence check"));
 
+static cl::opt<bool> EnableReduceLoadOpStoreWidth(
+    "combiner-reduce-load-op-store-width", cl::Hidden, cl::init(true),
+    cl::desc("DAG cominber enable reducing the width of load/op/store "
+             "sequence"));
+
 namespace {
 
   class DAGCombiner {
@@ -15405,6 +15410,9 @@
 /// narrowing the load and store if it would end up being a win for performance
 /// or code size.
 SDValue DAGCombiner::ReduceLoadOpStoreWidth(SDNode *N) {
+  if (!EnableReduceLoadOpStoreWidth)
+    return SDValue();
+
   StoreSDNode *ST  = cast<StoreSDNode>(N);
   if (!ST->isSimple())
     return SDValue();


-------------- next part --------------
A non-text attachment was scrubbed...
Name: D80745.266944.patch
Type: text/x-patch
Size: 1564 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20200528/be8d114c/attachment.bin>