[PATCH] D80457: AMDGPU/GlobalISel: Fixed handling of non-standard vectors

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp:58
+
+  for (unsigned Idx = 1, E = getNumSubRegIndices() - 1; Idx < E; ++Idx) {
+    unsigned Size = getSubRegIdxSize(Idx);
----------------
rampitec wrote:
> arsenm wrote:
> > Should probably put this into its own function with a FIXME that it should be a table produced by tablegen, also with a call_once?
> I am not really sure we initialize TRI exactly once, especially in a JIT, where llvm can be initialized and finalized multiple times.
It's initialized once per subtarget, but you can make it static. This is the un-tablegened hack from AMDGPURegisterBankInfo:

  // HACK: Until this is fully tablegen'd.
  static llvm::once_flag InitializeRegisterBankFlag;

  static auto InitializeRegisterBankOnce = [this]() {
    assert(&getRegBank(AMDGPU::SGPRRegBankID) == &AMDGPU::SGPRRegBank &&
           &getRegBank(AMDGPU::VGPRRegBankID) == &AMDGPU::VGPRRegBank &&
           &getRegBank(AMDGPU::AGPRRegBankID) == &AMDGPU::AGPRRegBank);
    (void)this;
  };

  llvm::call_once(InitializeRegisterBankFlag, InitializeRegisterBankOnce);
}


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  https://reviews.llvm.org/D80457/new/

https://reviews.llvm.org/D80457