[PATCH] D80147: AMDGPU/GlobalISel: Fix splitting 64-bit extensions

Matt Arsenault via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed May 20 07:02:24 PDT 2020


arsenm updated this revision to Diff 265225.
arsenm marked an inline comment as done.
arsenm added a comment.

Special case extend from s1 sext case. The zext case emits a constant 0, but I think this depends on whether it's using the CSEMIRbuilder or not. There's not much difference between copy of 0 or second copy of 0


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D80147/new/

https://reviews.llvm.org/D80147

Files:
  llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
  llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-anyext.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-zext.mir

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