[PATCH] D80147: AMDGPU/GlobalISel: Fix splitting 64-bit extensions

[Jay Foad via Phabricator via llvm-commits]

foad added inline comments.


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Comment at: llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp:2308-2310
+        // TODO: For sign extend case, we may be better off emitting another
+        // select rather than a shift of the sign bit (although the shift has
+        // better code size).
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arsenm wrote:
> foad wrote:
> > Surely the src is always i1 here, so the high part of dst will always be 0 (or undef for anyext)?
> Not if it’s G_SEXT
OK, but if it's G_ZEXT the high part is zero and if it's G_SEXT the high part is the same as the low part (and if it's G_ANYEXT the high part is undef). So in no case do you need either a shift or another select.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D80147/new/

https://reviews.llvm.org/D80147