[PATCH] D80191: MIR Statepoint refactoring: pass GC pointers in VRegs. Part 1/5.

[Denis Antrushin via Phabricator via llvm-commits]

dantrushin created this revision.
dantrushin added reviewers: reames, skatkov, bogner.
Herald added subscribers: llvm-commits, hiraditya.
Herald added a project: LLVM.

Change MIR representation of STATEPOINT instruction from explicit
spill/reload of GC pointer arguments around statepoint to simply
assigning them to virtual registers. Then they can be spilled as
necessary. Relocated pointers are represented as STATEPOINT's Def
operands (tied to corresponding derived pointers from GC args list):

rel1,rel2,... = STATEPOINT ..., derived1<tied-def0>, derived2<tied-def1>, ...

This patch introduces new SelectionDAG node, StatepointSDNode,
which looks like this:

[Relocates,] OUTCHAIN, GLUE = GC_STATEPOINT(...)

Due to limited storage available in SDNode subclasses, `Relocates`
correspond 1-1 to first N derived pointers.
Due to limited amount of tied registers supported by LLVM, `N` is
bounded by that limit. If there are more GC pointers, they are
passed using old scheme through stack slots.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D80191

Files:
  llvm/include/llvm/CodeGen/ISDOpcodes.h
  llvm/include/llvm/CodeGen/SelectionDAG.h
  llvm/include/llvm/CodeGen/SelectionDAGNodes.h
  llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp
  llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp

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