[PATCH] D79736: [PowerPC][NFC] Cleanup load/store spilling code

Kamau Bridgeman via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu May 14 12:31:05 PDT 2020


kamaub added a comment.

I think the index for the `StoreSpillOpcodesArray` and `LoadSpillOpcodesArray` arrays are incorrect.

Besides that the patch LGTM and I want to approve it.



================
Comment at: llvm/lib/Target/PowerPC/PPCInstrInfo.h:138
+    PPC::LWZ, PPC::LD, PPC::LFD, PPC::LFS, PPC::RESTORE_CR,                    \
+        PPC::RESTORE_CRBIT, PPC::LVX, PPC::LXVD2X, PPC::LXSDX, PPC::LXSSPX,    \
+        PPC::RESTORE_VRSAVE, PPC::QVLFDX, PPC::QVLFSXs, PPC::QVLFDXb,          \
----------------
The indentation in these code blocks needs to be unified.


================
Comment at: llvm/lib/Target/PowerPC/PPCInstrInfo.h:177
   const PPCRegisterInfo RI;
+  const unsigned StoreSpillOpcodesArray[2][SOK_LastOpcodeSpill] =
+      StoreOpcodesForSpill;
----------------
enums start at `0` so i think this should be `SOK_LastOpcodeSpill +1` right?


================
Comment at: llvm/lib/Target/PowerPC/PPCInstrInfo.h:179
+      StoreOpcodesForSpill;
+  const unsigned LoadSpillOpcodesArray[2][SOK_LastOpcodeSpill] =
+      LoadOpcodesForSpill;
----------------
Same as above comment.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D79736/new/

https://reviews.llvm.org/D79736





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